Physical Design Engineer
Job Profile:
• Need to have Basic understanding of DRM and need to translate that into
• Need to be Proficient in writing Cadence TechLEF and Synopsys TechFile
• Need to have knowledge on how to create Rapid MSOA kits.
• Need to have knowledge on Map files and their usage
• Should have knowledge on Cadence Innovus and Synopsys Fusion Compiler and should be able to create test case and run through the flow
• Should have knowledge about Extraction flows and should be able to run Block level extraction.
• Should have basic knowledge about standard cells
Skillset:
• Strong microelectronics fundamentals and Basic understanding of Full Custom Flow.
• 2 + years of working experience in Cadence Innovus and Synopsys Fusion Compiler
• Need to have scripting knowledge, preferable Shell, TCL and Python
Behaviours:
• Proficiency in English – reading, writing, speaking.
• Fast Learning and positive attitude.
• High customer orientation, curious to learn and adapt
• Interaction with Team members and Customers.
Job Features
| Job Category | IT |
| Experience | 2 - 5 years |
| Skills | Cadence Innovus and Synopsys Fusion Compiler |
| Primary skills | Cadence Innovus and Synopsys Fusion Compiler |
| Education | Any Graduate |
| Openings | 2 |
| rupa@aimplusstaffing.com |

